Cadence Tapes Out GDDR6 IP on Samsung 7LPP Using EUV
by Anton Shilov on November 26, 2018 3:00 PM EST
Cadence has announced that it has successfully taped out its GDDR6 IP on Samsung’s 7LPP fabrication process. The new building blocks should enable developers of various chips to be made using 7LPP and quickly and easily integrate support of GDDR6 memory into their SoCs.
Cadence’s GDDR6 IP solution includes the company’s Denali memory controller, physical interface, and verification IP. The controller and PHY are rated to handle up to 16 Gbps data transfer rates per pin and feature a low bit-error rate (BER) feature that decreases retries on the memory bus to cut-down latency and therefore ensure a greater memory bandwidth. The IP package is available as Cadence’s reference design that allows SoC developers to quickly replicate implementation that the IP designer used for its test chip.
Traditionally, GDDR memory has been used primarily for graphics cards, but with GDDR6 things look a bit different. Micron and a number of other companies are trying to drive GDDR6 to other applications as well. Apparently, they are not alone. Cadence says that its GDDR6 IP could be used for SoCs aimed at AI/ML, automated driving, ADAS, cryptocurrency mining, graphics, and high-performance computing (HPC) applications, essentially indicating interest towards GDDR6 from non-GPU developers. Meanwhile, being the world’s largest maker of DRAM, Samsung is clearly interested in adoption of GDDR6 by non-graphics applications.
Samsung’s 7LPP manufacturing technology is the company’s leading-edge fabrication process that uses extreme ultraviolet lithography (EUVL) for select layers. The tech is currently used to make an undisclosed SoC, but is expected to be used by a wider range of chips in the future. The GDDR6 IP from Cadence will naturally make 7LPP more attractive to designers of SoCs, but keep in mind that Samsung has a relatively limited EUVL capacity at the moment
Cadence’s GDDR6 IP is available now for customer engagements with design files ready for select clients.
Related Reading
- Samsung Starts Mass Production of Chips Using Its 7nm EUV Process Tech
- Arm and Samsung Extend Artisan POP IP Collaboration to 7LPP and 5LPE Nodes
- Samsung Foundry Roadmap: EUV-Based 7LPP for 2018, 3 nm Incoming
- Micron Begins Mass Production of GDDR6
- SK Hynix Lists GDDR6 Memory as ‘Available Now’, Publishes Final Specs
- Samsung Updates on GDDR6 Portfolio: 8 Gb and 16 Gb at Multiple Speeds
- Samsung Starts Mass Production of 16Gb GDDR6 Memory ICs with 18 Gbps I/O Speed
- Micron, Rambus, & Others Team Up To Spur GDDR6 Adoption in Non-GPU Products
Source: Cadence
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p1esk - Monday, November 26, 2018 - link
So how does GDDR6 compare to DDR4?Ryan Smith - Monday, November 26, 2018 - link
Really fast (14Gbps/pin versus 3.2Gbps/pin). Really power hungry (a few times the power consumption).DanNeely - Monday, November 26, 2018 - link
AFAIK it's also tuned farther in favor of sequential/streaming access than to random IO.saratoga4 - Monday, November 26, 2018 - link
Fairly similar. Bandwidth is doubled over GDDR5 by configuring the chip internally as two arrays of GDDR5-like DRAM that can be addressed and read from in parallel, for an effective doubling of the bandwidth compared to GDDR5. Each channel has the same 8n prefetch as DDR4, but there are two channels multiplexed over the bus.Anymoore - Monday, November 26, 2018 - link
Tapeout is not silicon.saratoga4 - Monday, November 26, 2018 - link
The title of the post makes it pretty clear that they've announced intellectual property, not a product.webdoctors - Monday, November 26, 2018 - link
Author writes this:Traditionally, GDDR memory has been used primarily for graphics cards, but with GDDR6 things look a bit different.
Than doesn't explain why its different, just vendors are advertising it in other markets.
GDDR memory hasn't been used in desktop or mobile since its more expensive, less capacity and uses more power.
The author doesn't explain any technical reason why GDDR6 would differ for these 3 areas. SAD
danielfranklin - Monday, November 26, 2018 - link
Meh, its still only a press release for a tapeout. Once they have some silicon and have signed up some customers we can start the real conversion.I think its pretty easy to work out from this where this will end up, all the massive processing we are looking at doing in cars and every other device we can think of in coming years, anywhere where GPU like processing could have sped things up, they will be making lower power purpose built SOCs with this attached.
ZolaIII - Tuesday, November 27, 2018 - link
It culd end up in HiSilicon servers as early as next year. Cadence doesn't make products but IP's but list of the partners is long including such as: AMD, Samsung, Mediatek, HiSilicon...iwod - Tuesday, November 27, 2018 - link
So what happen to HBM 2/3? Which should have brought us to 1TB/s Memory Bandwidth.